This invention relates to semiconductor devices. More particularly, it is concerned with methods of fabricating semiconductor device structures having trenches or grooves therein.
One type of semiconductor device which is capable of operation at relatively high frequency and power is the static induction transistor. The static induction transistor generally uses vertical geometry with source and drain electrodes placed on opposite sides of a thin, high resistivity layer of one conductivity type. Gate regions of the opposite conductivity type are positioned in the high resistivity layer on opposite sides of the source. During operation a reverse bias is applied between the gate region and the remainder of the high resistivity layer causing a depletion region to extend into the channel region below the source. As the magnitude of the reverse bias is varied, a source-drain current and voltage derived from an attached energy source will also vary.
Improved static induction transistors having recessed gate structures and methods of manufacturing such devices are described in U.S. Pat. No. 4,611,384 issued Sep. 16, 1986, to Bencuya, et al. and U.S. patent application Ser. No. 403,621, filed Sep. 6, 1989, by Bulat, et al. and assigned to the assignee of the present invention. The structures of these and other related devices have silicon to silicon oxide interfaces at which surface state charges accumulate causing leakage currents to flow thus degrading device performance.